Hardware for Hidden Markov-Model-Based, Large-Vocabulary Real-Time Speech Recognition
7266Authors
nan
Abstract
SRI and U.C. Berkeley have begun a cooper- ative effort to develop a new architecture for real-time implementation of spoken language systems (SLS). Our goal is to develop fast speech recognition algorithms, and support- ing hardware capable of recognizing continu- ous speech from a bigram- or trigram-based 20,000-word vocabulary or a 1,000- to 5,000- word SLS. 1
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Hardware for Hidden Markov-Model-Based, Large-Vocabulary Real-Time Speech Recognition M. Weintraub, G. Chen, J. Mankoski, H. Murveit SRI International A. StSlzle, S. Narayanaswamy, P. Schrupp, B. Richards, J. Rabaey, R. Brodersen University of California, Berkeley, CA Abstract SRI and U.C. Berkeley have begun a cooper- ative effort to develop a new architecture for real-time implementation of spoken language systems (SLS). Our goal is to develop fast speech recognition algorithms, and support- ing hardware capable of recognizing continu- ous speech from a bigram- or trigram-based 20,000-word vocabulary or a 1,000- to 5,000- word SLS. 1 Introduction In order to implement a hid- den Markov-model-based, real-time, large- vocabulary speech recognition system it is necessary to support the most time-critical parts of the algorithm in custom VLSI hard- ware. For systems with 20,000 words and more it is also necessary to have algorithmic support to reduce the amount of computa- tions that have to be done. Our first version of real-time speech recog- nition hardware [1] was targeted for sys- tems with up to 3,000 words. It continu- ously processed all the states of the Markov model that describe the vocabulary words, even states that are not likely to fit to the speech that has to be recognized. However, for larger systems (20,000 words and more) it is necessary to perform a pruning algorithm such that only states with a high probabil- ity are processed. Nevertheless, it is desir- able to process as many states as possible to reduce the risk that meaningful states are pruned. Our first hardware version used dy- namic memories with an access cycle time of 200 ns, and since accessing memory is the crucial bottleneck of the system, not more than 5,000 states per frame could be pro- cessed. Other shortcomings were that the board design turned out to be very compli- cated: at the end of each frame most of the memories had to be flipped between proces- sors. Since these memories also had to be accessed by the host processor, about 50% of the board area was used just for multiplexing the buses. In addition, the grammar pro- cessing system was implemented with cus- tom hardware such that only systems with a statistical bigram grammar [1] could be sup- ported. This paper describes a new system that implements pruning and is capable of pro- cessing up to 20 million active states per second. Assuming that a frame has a du- ration of 10 ms and a phoneme is modeled with three states, a vocabulary word is mod- eled with an average of six phonemes, 50% of the vocabulary words are active at any given frame and that one third of the phones 82 in these words are active, the new system can perform in real time for vocabulary sizes of up to 60,000 words. It also contains cus- tom hardware to support grammar process- ing routines that are common to a whole vari- ety of grammar models. Thus, grammar pro- cessing or natural language processing can be …
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Labeled Text
SRI and U.C. Berkeley have begun a cooper- ative effort to develop a new architecture for real-time implementation of spoken language systems (SLS). Our goal is to develop fast speech recognition algorithms, and support- ing hardware capable of recognizing continu- ous speech from a bigram- or trigram-based 20,000-word vocabulary or a 1,000- to 5,000- word SLS. 1
Publication Details
- Paper ID:
- 7266
- Year:
- 1990
- Publication:
- TIPSTER
- Publication Type:
- conf
- DOI:
- nan